UNIVERSAL SERIAL BUS SYSTEM ARCHITECTURE
ABOUT THIS BOOK THE MINDSHARE ARCHITECTURE SERIES CAUTIONARY NOTE SPECIFICATIONS THIS BOOK IS BASED ON ORGANIZATION OF THIS BOOK PART ONE: OVERVIEW OF USB 20 PART TWO: LOW- & FULL-SPEED DEVICE OPERATION PART III: HIGH-SPEED DEVICE OPERATION PART IV: USB 20 HUB OPERATION WITH LS/FS/HS DEVICES PART VI: USB SOFTWARE OVERVIEW APPENDICES WHO SHOULD READ THIS BOOK PREREQUISITE KNOWLEDGE DOCUMENTATION CONVENTIONS HEXADECIMAL NOTATION BINARY NOTATION DECIMAL NOTATION BITS VERSUS BYTE NOTATION IDENTIFICATION OF BIT FIELDS (LOGICAL GROUPS OF BITS OR SIGNALS) VISIT OUR WEB PAGE WE WANT YOUR FEEDBACK CHAPTER 1: DESIGN GOALS OF USB SHORTCOMINGS OF THE ORIGINAL PC I/O PARADIGM LIMITED SYSTEM RESOURCES INTERRUPTS I/O ADDRESSES NON-SHAREABLE INTERFACES END USER CONCERNS CABLE CRAZED INSTALLATION AND CONFIGURATION OF EXPANSION CARDS NO HOT ATTACHMENT OF PERIPHERALS COST THE USB PARADIGM ENHANCED SYSTEM PERFORMANCE HOT PLUG AND PLAY SUPPORT CONTENTS EXPANDABILITY LEGACY HARDWARE/SOFTWARE SUPPORT LOW COST SUMMARY OF KEY USB FEATURES HOW TO GET THE USB SPECIFICATIONS CHAPTER 2: THE BIG PICTURE OVERVIEW USB 1X SYSTEMS AND DEVICES LOW-SPEED AND FULL-SPEED DEVICES HOW TRANSACTIONS ARE GENERATED WHAT THE DESCRIPTORS CONTAIN HOW THE TRANSFER DESCRIPTORS ARE FETCHED FRAME GENERATION SHARING THE BUS BANDWIDTH CONSIDERATION SUMMARY 20 SYSTEMS AND DEVICES LOW-SPEED AND FULL-SPEED DEVICES IN A 20 SYSTEM EXAMPLE 20 HOST CONTROLLER SUPPORT FOR LS/FS DEVICES HIGH-SPEED DEVICES IN A 20 SYSTEM HIGH-SPEED DEVICES ATTACHED TO 1X PORTS HIGH-SPEED TRANSACTIONS AND MICROFRAME GENERATION HIGH-SPEED BANDWIDTH SUMMARY THE PLAYERS USB CLIENT DRIVERS USB BUS DRIVER USB HOST CONTROLLER DRIVER USB HOST CONTROLLER/ROOT HUB THE HOST CONTROLLER THE ROOT HUB USB HUBS HUB CONTROLLER HUB REPEATER HUB’S ROLE IN CONFIGURATION USB DEVICES HIGH-SPEED DEVICES FULL-SPEED DEVICES LOW-SPEED DEVICES USB COMMUNICATIONS MODEL COMMUNICATIONS FLOW TRANSFERS, IRPS, FRAMES, AND PACKETS TRANSFERS THE USB DRIVER, IRPS, AND FRAMES THE HOST CONTROLLER DRIVER AND TRANSACTIONS THE HOST CONTROLLER AND PACKETS DEVICE FRAMEWORK (HOW DEVICES PRESENT THEMSELVES TO SOFTWARE) DEVICE DESCRIPTORS DEVICE FRAMEWORK USB BUS INTERFACE LAYER USB DEVICE LAYER FUNCTION LAYER USB PERIPHERAL CONNECTION FULL-SPEED HUBS HIGH-SPEED HUBS LOW- AND FULL-SPEED DEVICES TOPOLOGY CHAPTER 3: CABLES AND CONNECTORS THE CONNECTORS SERIES A CONNECTORS SERIES B CONNECTORS CABLES LOW-SPEED CABLES FULL- AND HIGH-SPEED CABLES CABLE POWER ELECTRICAL AND MECHANICAL SPECIFICATIONS CHAPTER 4: USB CABLE POWER DISTRIBUTION USB POWER HUBS CURRENT BUDGET OVER-CURRENT PROTECTION VOLTAGE DROP BUDGET POWER SWITCHING BUS-POWERED HUBS POWER DURING HUB CONFIGURATION BUS-POWERED HUB ATTACHED TO 500MA PORT BUS-POWERED HUB ATTACHED TO 100MA PORT BUS-POWERED HUB ATTACHED TO PORT WITH >100MA BUT <500MA CURRENT LIMITING BUS-POWERED DEVICES LOW-POWER DEVICES HIGH-POWER DEVICES POWER DURING CONFIGURATION INSUFFICIENT PORT POWER SELF-POWERED HUBS LOCALLY POWERED BUS INTERFACE HYBRID POWERED DEVICE SELF-POWERED DEVICES PART TWO LOW- & FULL-SPEED DEVICE OPERATION CHAPTER 5: LS/FS SIGNALING ENVIRONMENT OVERVIEW DETECTING DEVICE ATTACHMENT AND SPEED DETECT FULL-SPEED DEVICE CONNECT LOW-SPEED DEVICE CONNECT DETECTING DEVICE DISCONNECT BUS IDLE DEVICE RESET DIFFERENTIAL SIGNALING DIFFERENTIAL DRIVERS FULL-SPEED DRIVERS LOW-SPEED DRIVERS HUB DRIVER CHARACTERISTICS DIFFERENTIAL RECEIVERS START OF PACKET (SOP) END OF PACKET (EOP) SINGLE-ENDED RECEIVERS NRZI ENCODING BIT STUFFING SUMMARY OF USB SIGNALING STATES CHAPTER 6: LS/FS TRANSFER TYPES & SCHEDULING OVERVIEW CLIENT INITIATES TRANSFER COMMUNICATIONS PIPES COMMUNICATION INITIATED BY I/O REQUEST PACKETS FRAME-BASED TRANSFERS TRANSFER TYPES ISOCHRONOUS TRANSFERS DIRECTION OF TRANSFERS SERVICE PERIOD BANDWIDTH ALLOCATION ERROR RECOVERY ESTABLISHING SYNCHRONOUS CONNECTIONS THE PROBLEM WITH ISOCHRONOUS TRANSFERS THE FEEDBACK/FEED FORWARDING SOLUTION SYNCHRONIZATION TYPES SOURCE/SINK COMBINATIONS AND SYNCHRONIZATION METHODS ASYNCHRONOUS SOURCE AND ASYNCHRONOUS SINK ASYNCHRONOUS SOURCE AND SYNCHRONOUS SINK ASYNCHRONOUS SOURCE AND ADAPTIVE SINK SYNCHRONOUS SOURCE AND ASYNCHRONOUS SINK SYNCHRONOUS SOURCE AND SYNCHRONOUS SINK SYNCHRONOUS SOURCE AND ADAPTIVE SINK ADAPTIVE SOURCE AND ASYNCHRONOUS SINK ADAPTIVE SOURCE AND SYNCHRONOUS SINK ADAPTIVE SOURCE AND ADAPTIVE SINK HOW ENDPOINTS REPORT THEIR SYNCHRONIZATION CAPABILITIES FEEDBACK DATA ASSOCIATION BETWEEN DATA ENDPOINT AND FEEDBACK ENDPOINT INTERRUPT TRANSFERS BUS BANDWIDTH ALLOCATION CONTROL TRANSFERS BULK TRANSFERS CHAPTER 7: PACKETS & TRANSACTIONS OVERVIEW PACKETS — THE BASIC BUILDING BLOCKS OF USB TRANSACTIONS SYNCHRONIZATION SEQUENCE PACKET IDENTIFIER PACKET-SPECIFIC INFORMATION CYCLIC REDUNDANCY CHECKING (CRC) TOKEN PACKETS SOF PACKET IN PACKET OUT PACKET SETUP PACKET DATA PACKETS — DATA0 AND DATA1 HANDSHAKE PACKETS PREAMBLE PACKET TRANSACTIONS IN TRANSACTIONS IN TRANSACTION WITHOUT ERRORS IN TRANSACTION WITH ERRORS IN TRANSACTION WITH NO INTERRUPT PENDING/TARGET BUSY IN TRANSACTION WITH TARGET STALLED IN TRANSACTION DURING ISOCHRONOUS TRANSFER OUT TRANSACTIONS OUT TRANSACTION WITHOUT DATA PACKET ERRORS OUT TRANSACTION WITH ERRORS OUT TRANSACTION — TARGET UNABLE TO ACCEPT DATA OUT TRANSACTION WITH TARGET STALLED OUT TRANSACTION DURING ISOCHRONOUS TRANSFER SETUP TRANSACTIONS/CONTROL TRANSFERS TWO STAGE CONTROL TRANSFER THREE STAGE CONTROL TRANSFER WITH IN DATA STAGE THREE STAGE CONTROL TRANSFER WITH OUT DATA STAGE CONTROL TRANSFERS WITH ERRORS CHAPTER 8: ERROR RECOVERY OVERVIEW PACKET ERRORS PID CHECKS CRC ERRORS BIT STUFF ERRORS PACKET-RELATED ERROR HANDLING TOKEN PACKET ERRORS IN PACKET ERRORS OUT OR SETUP PACKET ERRORS DATA PACKET ERRORS DURING OUT OR SETUP TRANSACTIONS DURING IN TRANSACTIONS HANDSHAKE PACKET ERRORS DURING OUT TRANSACTIONS BUS TIME-OUT FALSE EOPS FALSE EOP DURING HOST TRANSMISSION FALSE EOP DURING TARGET TRANSMISSION DATA TOGGLE ERRORS DATA TOGGLE PROCEDURE WITHOUT ERRORS DATA TOGGLE DURING OUT TRANSACTIONS DATA TOGGLE DURING IN TRANSACTIONS DATA TOGGLE PROCEDURE WITH DATA PACKET ERRORS DATA TOGGLE AND DATA PACKET ERRORS — OUT TRANSACTIONS DATA TOGGLE AND DATA PACKET ERRORS — IN TRANSACTIONS DATA TOGGLE PROCEDURE WITH HANDSHAKE PACKET ERRORS DATA TOGGLE AND HANDSHAKE ERRORS — OUT TRANSACTIONS DATA TOGGLE WITH HANDSHAKE PACKET ERROR — IN TRANSACTION SPECIAL CASE: DATA TOGGLE DURING CONTROL TRANSFER BABBLING DEVICES LOSS OF ACTIVITY (LOA) BABBLE/LOA DETECTION AND RECOVERY FRAME TIMER HOST TO HUB SKEW HUB REPEATER STATE MACHINE ISOCHRONOUS TRANSFERS (DELIVERY NOT GUARANTEED) INTERRUPT TRANSFER ERROR RECOVERY BULK TRANSFER ERROR RECOVERY CONTROL TRANSFER ERROR RECOVERY CHAPTER 9: USB POWER CONSERVATION POWER CONSERVATION — SUSPEND DEVICE RESPONSE TO SUSPEND HUB RESPONSE TO SUSPEND GLOBAL SUSPEND INITIATING GLOBAL SUSPEND RESUME FROM GLOBAL SUSPEND RESUME INITIATED BY HOST REMOTE WAKEUP FROM DEVICE REMOTE WAKEUP VIA HUB PORT EVENT SELECTIVE SUSPEND INITIATING SELECTIVE SUSPEND RESUME FROM SELECTIVE SUSPEND HOST INITIATED SELECTIVE RESUME SELECTIVE WAKEUP FROM DEVICE SELECTIVE SUSPEND WHEN HUB IS SUSPENDED DEVICE SIGNALS RESUME PORT RECEIVES CONNECT OR DISCONNECT SELECTIVE SUSPEND FOLLOWED BY GLOBAL SUSPEND RESUME VIA RESET HUB FRAME TIMER AFTER WAKEUP PART THREE HIGH SPEED DEVICE OPERATION CHAPTER 10: OVERVIEW OF HS DEVICE OPERATION OVERVIEW NEW HIGH-SPEED DEVICE FEATURES 1X USB DEVICE SUPPORT THE 20 HOST CONTROLLER CHAPTER 11: THE HIGH-SPEED SIGNALING ENVIRONMENT OVERVIEW DETECTING HIGH-SPEED DEVICE ATTACHMENT INITIAL DEVICE DETECTION DEVICE RESET AND THE CHIRP SEQUENCE HIGH-SPEED INTERFACES IDLED HIGH-SPEED DIFFERENTIAL SIGNALING IMPEDANCE MATCHING HIGH-SPEED DRIVER CHARACTERISTICS HIGH-SPEED IDLE HIGH-SPEED DIFFERENTIAL RECEIVERS HIGH-SPEED DRIVER/RECEIVER COMPLIANCE TESTING ACTIVATING TEST MODE THE TEST SETUP EYE PATTERN TESTS TRANSMIT EYE PATTERN TESTS RECEIVER EYE PATTERN TESTS HIGH-SPEED START OF PACKET & SYNCHRONIZATION SEQUENCE HIGH-SPEED END OF PACKET (EOP) DETECTION OF HIGH-SPEED DEVICE REMOVAL HIGH-SPEED RESET AND SUSPEND SIGNALING RESET SIGNALING SUSPEND DIFFERENTIATING BETWEEN RESET AND SUSPEND CHAPTER 12: HS TRANSFERS, TRANSACTIONS, & SCHEDULING OVERVIEW HIGH-SPEED TRANSACTION SCHEDULING MICROFRAMES THEORETICAL HS BANDWIDTH PERIODIC TRANSFERS HIGH-SPEED ISOCHRONOUS TRANSFERS MAXIMUM PACKET SIZE ISOCHRONOUS BANDWIDTH/PERFORMANCE ISOCHRONOUS TRANSACTION ERRORS HIGH-SPEED INTERRUPT TRANSFERS INTERRUPT BANDWIDTH INTERRUPT TRANSACTION ERRORS HIGH-BANDWIDTH TRANSACTIONS DETECTING HIGH-BANDWIDTH ENDPOINTS AND PACKET SIZE ISOCHRONOUS HIGH-BANDWIDTH SCHEDULING AND PROTOCOL HIGH-BANDWIDTH ISOCHRONOUS IN TRANSACTIONS HIGH-BANDWIDTH ISOCHRONOUS OUT TRANSACTIONS HIGH BANDWIDTH INTERRUPT TRANSACTIONS HIGH BANDWIDTH THROUGHPUT NON-PERIODIC TRANSFERS HIGH-SPEED BULK TRANSFERS BULK BANDWIDTH BULK TRANSACTIONS ERRORS HIGH-SPEED CONTROL TRANSFERS HIGH-SPEED CONTROL BANDWIDTH PING TRANSACTIONS THE PROBLEM THE SOLUTION THE PING PROTOCOL PING PACKET HANDSHAKE RESPONSES CHAPTER 13: HS ERROR DETECTION AND HANDLING OVERVIEW HIGH-SPEED BUS TIME-OUT FALSE EOP HS BABBLING DEVICE DETECTION CHAPTER 14: HS SUSPEND AND RESUME OVERVIEW ENTERING DEVICE SUSPEND DEVICE RESUME PART FOUR USB 20 HUB OPERATION WITH LS/FS/HS DEVICES CHAPTER 15: HS HUB OVERVIEW OVERVIEW USB 20 HUB ATTACHED TO HIGH-SPEED PORT HIGH-SPEED TRANSACTIONS LOW- AND FULL-SPEED TRANSACTIONS USB 20 HUB ATTACHED TO FULL-SPEED PORT CHAPTER 16: 20 HUBS DURING HS TRANSACTIONS OVERVIEW HIGH-SPEED HUB REPEATER RECEIVER SQUELCH RE-CLOCKING THE PACKET PORT SELECTOR STATE MACHINE ELASTICITY BUFFER THE REPEATER STATE MACHINE CHAPTER 17: 20 HUBS DURING LS/FS TRANSACTIONS OVERVIEW THE STRUCTURE OF SPLIT TRANSACTIONS ISOCHRONOUS SPLIT TRANSACTION EXAMPLES EXAMPLE SPLIT ISOCHRONOUS OUT TRANSACTION EXAMPLE SPLIT ISOCHRONOUS IN TRANSACTION EXAMPLE SPLIT TRANSACTIONS WITH DATA VERIFICATION SPLIT OUT SEQUENCE SPLIT IN SEQUENCE THE SPLIT TOKEN PACKET THE TRANSACTION TRANSLATOR THE MAJOR ELEMENTS OF THE TRANSACTION TRANSLATOR HIGH-SPEED HANDLER PERIODIC TRANSFER START-SPLIT BUFFER PERIODIC COMPLETE-SPLIT BUFFER BULK/CONTROL BUFFERS LOW-SPEED/FULL-SPEED HANDLER SPLIT TRANSACTION SCHEDULING SPLIT TRANSACTION SCHEDULING EXAMPLE SOF PACKETS HOST DELIVERS ISOCHRONOUS START SPLIT HOST DELIVERS INTERRUPT START SPLIT FULL- AND LOW-SPEED TRANSACTIONS BEGIN HOST ISSUES COMPLETE-SPLIT TO FETCH ISOCHRONOUS IN DATA HOST FETCHES INTERRUPT OUT COMPLETION STATUS HOST CONTINUES TO FETCH ISOCHRONOUS IN DATA TRANSACTION END HIGH-SPEED SCHEDULING CAN INCLUDE OTHER TRANSACTIONS SINGLE VERSUS MULTIPLE TRANSACTION TRANSLATORS PERIODIC SPLIT TRANSACTIONS PERIODIC SPLIT TRANSACTION PIPELINE HIGH SPEED HANDLER RECEIVES START SPLIT START-SPLIT BUFFER COMPLETE-SPLIT BUFFER ISOCHRONOUS OUT SPLIT TRANSACTION SEQUENCE ISOCHRONOUS OUT START SPLIT START-SPLIT TRANSACTION RECEIVED WITH NO ERRORS START-SPLIT TRANSACTION WITH ERRORS HANDLING CRC16 DURING SPLIT ISOCHRONOUS OUT TRANSACTIONS ISOCHRONOUS IN SPLIT TRANSACTION SEQUENCE ISOCHRONOUS IN START SPLIT ISOCHRONOUS IN COMPLETE SPLIT COMPLETE SPLIT PACKET ERROR COMPLETE SPLIT WITH MDATA COMPLETE SPLIT WITH DATA0 COMPLETE SPLIT WITH NYET COMPLETE SPLIT WITH ERR HANDLING CRC16 DURING SPLIT ISOCHRONOUS IN TRANSACTIONS INTERRUPT SPLIT OUT TRANSACTION SEQUENCE INTERRUPT OUT START SPLIT SEQUENCE INTERRUPT OUT COMPLETE SPLIT SEQUENCE COMPLETE SPLIT WITH ACK COMPLETE SPLIT WITH NAK COMPLETE SPLIT WITH STALL INTERRUPT IN SPLIT TRANSACTION SEQUENCE INTERRUPT IN START SPLIT SEQUENCE INTERRUPT IN COMPLETE SPLIT SEQUENCE COMPLETE SPLIT WITH DATA0/1 HANDLING CRC16 DURING SPLIT INTERRUPT IN TRANSACTIONS NON PERIODIC SPLIT TRANSACTIONS NON-PERIODIC SPLIT TRANSACTION PIPELINE HIGH SPEED HANDLER NON-PERIODIC BUFFERS LOW-/FULL-SPEED HANDLER BULK/CONTROL SPLIT OUT TRANSACTION SEQUENCE BULK/CONTROL OUT START SPLIT SEQUENCE START SPLIT WITH PACKET ERROR START SPLIT WITH ACK START SPLIT WITH NAK BULK/CONTROL OUT COMPLETE SPLIT SEQUENCE BULK/CONTROL SPLIT IN TRANSACTION SEQUENCE BULK/CONTROL IN START SPLIT SEQUENCE BULK/CONTROL IN COMPLETE SPLIT SEQUENCE PART FIVE USB DEVICE CONFIGURATION CHAPTER 18: CONFIGURATION PROCESS OVERVIEW THE CONFIGURATION SOFTWARE ELEMENTS CONFIGURATION SOFTWARE DEFAULT CONTROL PIPE RESOURCE MANAGEMENT DEVICE CLIENT SOFTWARE ROOT HUB CONFIGURATION EACH DEVICE IS ISOLATED FOR CONFIGURATION RESET FORCES DEVICE TO DEFAULT ADDRESS (ZERO) HOST ASSIGNS A UNIQUE DEVICE ADDRESS HOST SOFTWARE VERIFIES CONFIGURATION POWER REQUIREMENTS BUS BANDWIDTH CONFIGURATION VALUE IS ASSIGNED CLIENT SOFTWARE IS NOTIFIED CHAPTER 19: USB DEVICE CONFIGURATION OVERVIEW SUMMARY OF CONFIGURATION PROCESS HOW SOFTWARE DETECTS DEVICE ATTACHMENT & SPEED POLLING THE STATUS CHANGE ENDPOINT GETTING PORT STATUS RESETTING THE PORT READING AND INTERPRETING THE USB DESCRIPTORS THE STANDARD DESCRIPTORS HOW SOFTWARE ACCESSES THE DESCRIPTORS DEVICE DESCRIPTOR CLASS CODE FIELD MAXIMUM PACKET SIZE ZERO MANUFACTURER, PRODUCT, SERIAL NUMBER NUMBER OF CONFIGURATIONS DEVICE QUALIFIER DESCRIPTOR CONFIGURATION DESCRIPTORS NUMBER OF INTERFACES CONFIGURATION VALUE ATTRIBUTES AND MAXIMUM POWER OTHER SPEED CONFIGURATION DESCRIPTOR INTERFACE DESCRIPTORS INTERFACE NUMBER AND ALTERNATE SETTING NUMBER OF ENDPOINTS INTERFACE CLASS AND SUBCLASS PROTOCOL ENDPOINT DESCRIPTORS DEVICE STATES ATTACHED STATE POWERED STATE DEFAULT STATE ADDRESSED STATE CONFIGURED STATE SUSPEND STATE CLIENT SOFTWARE CONFIGURATION CHAPTER 20: HUB CONFIGURATION CONFIGURING THE HUB THE DEFAULT PIPE THE STATUS CHANGE PIPE READING THE HUB’S DESCRIPTORS 1X HUB DESCRIPTORS HUB’S STANDARD DEVICE DESCRIPTOR HUB CONFIGURATION DESCRIPTOR BUS- OR SELF-POWERED HUB MAXIMUM BUS POWER CONSUMED HUB INTERFACE DESCRIPTOR STATUS ENDPOINT DESCRIPTOR STATUS CHANGE ENDPOINT ADDRESS/TRANSFER DIRECTION TRANSFER TYPE MAXIMUM DATA PACKET SIZE POLLING INTERVAL HUB CLASS DESCRIPTOR POWER SWITCHING MODE IMPLEMENTED COMPOUND DEVICE OR HUB ONLY OVER-CURRENT PROTECTION MODE POWER ON TO POWER GOOD DELAY MAXIMUM BUS CURRENT FOR HUB CONTROLLER DEVICE REMOVABLE/NON-REMOVABLE PORT POWER MASK HIGH-SPEED CAPABLE HUB DESCRIPTORS DESCRIPTORS WHEN HUB IS OPERATING AT FULL SPEED THE 20 HUB’S CLASS-SPECIFIC DESCRIPTOR POWERING THE HUB CHECKING HUB STATUS DETECTING HUB STATUS CHANGES READING THE HUB STATUS FIELD READING PORT STATUS ENABLING THE DEVICE SUMMARY OF HUB PORT STATES CHAPTER 21: DEVICE CLASSES OVERVIEW DEVICE CLASSES AUDIO DEVICE CLASS STANDARD AUDIO INTERFACE REQUIREMENTS AUDIO CLASS-SPECIFIC DESCRIPTORS AUDIO CLASS-SPECIFIC REQUESTS COMMUNICATIONS DEVICE CLASS COMMUNICATIONS DEVICE INTERFACES COMMUNICATIONS CLASS-SPECIFIC DESCRIPTORS COMMUNICATIONS CLASS-SPECIFIC REQUESTS DISPLAY DEVICE CLASS THE STANDARD DISPLAY DEVICE CLASS INTERFACE DISPLAY DEVICE-SPECIFIC DESCRIPTORS DEVICE-SPECIFIC REQUESTS MASS STORAGE DEVICE CLASS STANDARD MASS STORAGE INTERFACE CONTROL ENDPOINT BULK TRANSFER ENDPOINTS INTERRUPT ENDPOINT GENERAL MASS STORAGE SUBCLASS CD-ROM SUBCLASS TAPE SUBCLASS SOLID STATE SUBCLASS CLASS- AND DEVICE-SPECIFIC USB REQUESTS PART SIX USB SOFTWARE OVERVIEW CHAPTER 22: OVERVIEW OF USB HOST SOFTWARE USB SOFTWARE DEVICE LAYER INTERFACE LAYER THE SOFTWARE COMPONENTS USB DRIVER (USBD) CONFIGURATION MANAGEMENT USB ELEMENTS REQUIRING CONFIGURATION ALLOCATING USB RESOURCES VERIFYING POWER TRACKING AND ALLOCATING BUS BANDWIDTH BUS BANDWIDTH RECLAMATION DATA TRANSFER MANAGEMENT PROVIDING CLIENT SERVICES (THE USB DRIVER INTERFACE) PIPE MECHANISMS CLIENT PIPE REQUIREMENTS COMMAND MECHANISMS