THE 8051 MICROCONTROLLER: ARCHITECTURE, PROGRAMMING, AND APPLICATIONS

By PATRICIA CLARK

CONTENTS 1 INTRODUCTION CHAPTER OBJECTIVES INTRODUCTION MICROPROCESSOR MICROPROCESSOR-BASED SYSTEM MICROCONTROLLER GENERAL ARCHITECTURE SOFTWARE PROTECTION IN MICROCONTROLLERS BRIEF HISTORY OF INTEL MICROCONTROLLERS MCS-51 FAMILY PRINCETON AND HARVARD ARCHITECTURES POWER MANAGEMENT MICROCONTROLLER PACKAGING PLASTIC DUAL-INLINE PACKAGE (PDIP) QUAD FLAT PACKAGE (QFP) PLASTIC-LEADED CHIP CARRIER (PLCC) PLASTIC QUAD FLAT PACK (PQFP) THIN QUAD FLAT PACK (TQFP) FUTURE TREND SUMMARY POINTS TO REMEMBER REVIEW QUESTIONS EVALUATE YOURSELF SEARCH FOR ANSWERS THINK AND SOLVE 2 GENERAL ARCHITECTURE EXTERNAL FEATURES PINS AND SIGNALS INTERNAL ARCHITECTURE PROGRAM MEMORY ORGANIZATION PIPELINE ARCHITECTURE PROGRAM LOCK BITS DATA MEMORY ORGANIZATION REGISTER BANKS BIT-ADDRESSABLE AREA SCRATCH-PAD AREA SYSTEM CLOCK RESET 3 I/O PORTS AND SPECIAL FUNCTION REGISTERS SFR MAP SFR FUNCTIONS PROCESSOR STATUS WORD COMPARISON WITH 8085 FLAGS ACCUMULATOR (REGISTER A) REGISTER B STACK POINTER PORT REGISTERS (P0, P1, P2 AND P3) COMPARING 8255 PPI WITH MCS-51 PORTS ARCHITECTURE OF MCS-51 PORTS DC CHARACTERISTICS OF MCS-51 PORTS POWER MANAGEMENT (PCON) 3 10 SOLVED EXAMPLES 4 ADDRESSING MODES AND DATA MOVE OPERATIONS ADDRESSING MODES IMMEDIATE ADDRESSING MODE DIRECT ADDRESSING MODE REGISTER DIRECT ADDRESSING MODE REGISTER INDIRECT ADDRESSING MODE DATA TRANSFER MNEMONICS FORMS OF MOV INSTRUCTION 16-BIT DATA LOAD 8-BIT DATA LOAD PRECAUTIONS IN HEXADECIMAL REPRESENTATIONS FORMAT OF MOV INSTRUCTION COMPARISON WITH 8085 MNEMONICS OPERAND EXPRESSIONS RESTRICTIONS IN ADDRESSING MODES READING FROM I/O PORTS SOLVED EXAMPLES 5 ARITHMETIC OPERATIONS ADD INSTRUCTION ADDC INSTRUCTION SUBB INSTRUCTION INC INSTRUCTION DEC INSTRUCTION 6 PROGRAM BRANCHING PROGRAM BRANCHING INSTRUCTIONS UNCONDITIONAL JUMPS LJMP INSTRUCTION AJMP INSTRUCTION SJMP INSTRUCTION APPLICATION OF AJMP AND SJMP CONDITIONAL BRANCHING JZ INSTRUCTION JNZ INSTRUCTION CJNE INSTRUCTION DJNZ INSTRUCTION LABELS IN PROGRAM LISTING NOP INSTRUCTION 7 PROGRAMMING EXAMPLES-I COPY BLOCK SHIFT BLOCK COUNT NO OF NULLS FIND CHECKSUM SUM OF NATURAL NUMBERS SUM OF A SERIES FIBONACCI SERIES GENERATE A SERIES 8 SUBROUTINES AND STACK NEED OF SUBROUTINES LCALL INSTRUCTION RET INSTRUCTION ACALL INSTRUCTION MECHANISM OF SUBROUTINES NESTING OF SUBROUTINES STACK PUSH INSTRUCTION POP INSTRUCTION 8 10 OTHER APPLICATIONS OF SUBROUTINE 8 11 COMPARISON WITH 8 12 SOLVED EXAMPLES 8 13 PARAMETER PASSING IN SUBROUTINES 9 LOGICAL OPERATIONS ANL INSTRUCTION ORL INSTRUCTION XRL INSTRUCTION CLR INSTRUCTION CPL INSTRUCTION RL INSTRUCTION RLC INSTRUCTION RR INSTRUCTION 9 10 RRC INSTRUCTION 9 11 SOLVED EXAMPLES 10 BOOLEAN VARIABLE MANIPULATION 10 1 INTRODUCTION 10 1 1 SOURCE AND DESTINATION OF BOOLEAN OPERATIONS 10 2 BOOLEAN DATA LOADING AND MOVEMENT 10 2 1 CLR INSTRUCTION 10 2 2 SETB INSTRUCTION 10 2 3 MOV INSTRUCTION 10 3 BIT-ORIENTED PROGRAM BRANCHING 10 3 1 JC INSTRUCTION 10 3 2 JNC INSTRUCTION 10 3 3 JB INSTRUCTION 10 3 4 JNB INSTRUCTION 10 4 BIT-ORIENTED LOGICAL OPERATIONS 10 4 1 ANL INSTRUCTION 10 4 2 ORL INSTRUCTION 10 4 3 CPL INSTRUCTION 10 5 SOLVED EXAMPLES 11 PROGRAMMING EXAMPLES-II 11 1 INTRODUCTION 11 2 COUNT 1S IN A BYTE 11 3 UNPACK A BCD NUMBER 11 4 PACK BCD DIGITS 11 5 PACK ARRAY OF UNPACKED BCD DIGITS 11 6 FIND LARGEST AND SMALLEST INTEGERS OF AN ARRAY 11 7 BUBBLE SORTING 11 8 FIND THE SUM OF FACTORIALS 11 9 SORT OUT NUMBERS DIVISIBLE BY 12 ADVANCED INSTRUCTIONS 12 1 INTRODUCTION 12 2 MOVC INSTRUCTION 12 3 MOVX INSTRUCTION 12 4 XCH INSTRUCTION 12 5 XCHD INSTRUCTION 12 6 MUL INSTRUCTION 12 7 DIV INSTRUCTION 12 8 DA A INSTRUCTION 12 9 JMP INSTRUCTION 12 10 SWAP INSTRUCTION 12 11 JBC INSTRUCTION 12 12 RETI INSTRUCTION 12 13 SOLVED EXAMPLES 13 PROGRAMMING EXAMPLES-III 13 1 COMPARE WITH EXTERNAL ARRAY 13 2 FIND SUM OF A SERIES 13 3 REVERSE AN ARRAY 13 4 HEX TO BCD CONVERSION 13 5 UPDATE CLOCK DISPLAY 13 6 DISPLAY SHIFT FOR RIGHT ENTRY 13 7 COUNT NUMBER OF WORDS 13 8 GENERATE PRIME NUMBERS 14 EXTERNAL INTERRUPTS 14 1 INTRODUCTION 14 1 1 WHAT IS AN INTERRUPT? 14 1 2 VECTORED INTERRUPT 14 2 EXTERNAL INTERRUPTS OF 14 3 SFRS FOR EXTERNAL INTERRUPT 14 3 1 TCON (BITS 0, 1, 2 AND 3) 14 3 2 IE (BITS 0, 2 AND 7) 14 3 3 IP (BITS 0 AND 2) 14 4 INTERRUPT SERVICE ROUTINE (ISR) 14 5 SOFTWARE INTERRUPTS 14 6 BENEFI TS OF INTERRUPT 14 7 SOLVED EXAMPLES