MICROPROCESSOR DESIGN

By MICHAEL BROWN

CONTENTS CHAPTER 1 THE EVOLUTION OF THE MICROPROCESSOR OVERVIEW OBJECTIVES INTRODUCTION THE TRANSISTOR THE INTEGRATED CIRCUIT THE MICROPROCESSOR MOORE’S LAW TRANSISTOR SCALING INTERCONNECT SCALING MICROPROCESSOR SCALING THE FUTURE OF MOORE’S LAW CONCLUSION KEY CONCEPTS AND TERMS REVIEW QUESTIONS BIBLIOGRAPHY CHAPTER 2 COMPUTER COMPONENTS BUS STANDARDS CHIPSETS PROCESSOR BUS MAIN MEMORY VIDEO ADAPTERS (GRAPHICS CARDS) STORAGE DEVICES EXPANSION CARDS PERIPHERAL BUS MOTHERBOARDS BASIC INPUT OUTPUT SYSTEM MEMORY HIERARCHY CHAPTER 3 DESIGN PLANNING PROCESSOR ROADMAPS DESIGN TYPES AND DESIGN TIME PRODUCT COST CHAPTER 4 COMPUTER ARCHITECTURE INSTRUCTIONS COMPUTATION INSTRUCTIONS DATA TRANSFER INSTRUCTIONS CONTROL ?OW INSTRUCTIONS INSTRUCTION ENCODING CISC VERSUS RISC RISC VERSUS EPIC RECENT X86 EXTENSIONS CHAPTER 5 MICROARCHITECTURE PIPELINING DESIGNING FOR PERFORMANCE MEASURING PERFORMANCE MICROARCHITECTURAL CONCEPTS CACHE MEMORY CACHE COHERENCY BRANCH PREDICTION REGISTER RENAMING MICROINSTRUCTIONS AND MICROCODE REORDER, RETIRE, AND REPLAY LIFE OF AN INSTRUCTION INSTRUCTION PREFETCH L2 CACHE READ INSTRUCTION DECODE TRACE CACHE WRITE MICROBRANCH PREDICTION UOP FETCH AND DRIVE ALLOCATION REGISTER RENAME LOAD INSTRUCTION QUEUE SCHEDULE AND DISPATCH REGISTER ?LE READ EXECUTE AND CALCULATE ?AGS RETIREMENT AND DRIVE CHAPTER 6 LOGIC DESIGN HARDWARE DESCRIPTION LANGUAGE DESIGN AUTOMATION PRE-SILICON VALIDATION LOGIC MINIMIZATION COMBINATIONAL LOGIC SEQUENTIAL LOGIC CHAPTER 7 CIRCUIT DESIGN MOSFET BEHAVIOR CMOS LOGIC GATES TRANSISTOR SIZING SEQUENTIALS CIRCUIT CHECKS TIMING NOISE POWER CHAPTER 8 LAYOUT CREATING LAYOUT LAYOUT DENSITY LAYOUT QUALITY CHAPTER 9 SEMICONDUCTOR MANUFACTURING WAFER FABRICATION LAYERING DOPING DEPOSITION THERMAL OXIDATION PLANARIZATION PHOTOLITHOGRAPHY MASKS WAVELENGTH AND LITHOGRAPHY ETCH EXAMPLE CMOS PROCESS FLOW CHAPTER 10 MICROPROCESSOR PACKAGING PACKAGE HIERARCHY PACKAGE DESIGN CHOICES NUMBER AND CON?GURATION OF LEADS LEAD TYPES SUBSTRATE TYPE DIE ATTACH DECOUPLING CAPACITORS THERMAL RESISTANCE MULTICHIP MODULES EXAMPLE ASSEMBLY FLOW CHAPTER 11 SILICON DEBUG AND TEST DESIGN FOR TEST CIRCUITS POST-SILICON VALIDATION VALIDATION PLATFORMS AND TESTS A BUG’S LIFE SILICON DEBUG SILICON TEST