PCI BUS DEMYSTIFIED
CONTENTS CHAPTER 1: INTRODUCING THE PERIPHERAL COMPONENT INTERCONNECT (PCI) BUS SO WHAT IS A COMPUTER BUS? BUS TAXONOMY WHAT’S WRONG WITH ISA AND ATTEMPTS TO FIX IT THE VESA LOCAL BUS INTRODUCING PCI FEATURES THE PCI SPECIAL INTEREST GROUP PCI SIGNALS SIGNAL GROUPS SIGNAL TYPES SIDEBAND SIGNALS DEFINITIONS SUMMARY CHAPTER 2: ARBITRATION THE ARBITRATION PROCESS AN EXAMPLE OF FAIRNESS BUS PARKING LATENCY CHAPTER 3: BUS PROTOCOL PCI BUS COMMANDS BASIC READ/WRITE TRANSACTIONS TRANSACTION TERMINATION—INITIATOR TRANSACTION TERMINATION—TARGET ERROR DETECTION AND REPORTING CHAPTER 4: OPTIONAL AND ADVANCED FEATURES INTERRUPT HANDLING “SPECIAL” CYCLE 64-BIT EXTENSIONS SYSTEM MANAGEMENT BUS (SMB) CHAPTER 5: ELECTRICAL AND MECHANICAL ISSUES A “GREEN” ARCHITECTURE SIGNALING ENVIRONMENTS—3V AND 5V 5 VOLT SIGNALING ENVIRONMENT 3 3 VOLT SIGNALING ENVIRONMENT TIMING SPECIFICATIONS 66 MHZ PCI MECHANICAL DETAILS CHAPTER 6: PLUG AND PLAY CONFIGURATION BACKGROUND CONFIGURATION ADDRESS SPACE CONFIGURATION HEADER—TYPE 0 BASE ADDRESS REGISTERS (BAR) (0X10 TO 0X24) EXPANSION ROM (0X30) CAPABILITIES LIST VITAL PRODUCT DATA CHAPTER 7: PCI BRIDGING BRIDGE TYPES CONFIGURATION ADDRESS TYPES CONFIGURATION HEADER—TYPE 1 CONTENTS BUS HIERARCHY AND BUS NUMBER REGISTERS ADDRESS FILTERING—THE BASE AND LIMIT REGISTERS PREFETCHING AND POSTING TO IMPROVE PERFORMANCE INTERRUPT HANDLING ACROSS A BRIDGE BRIDGE SUPPORT FOR VGA—PALETTE “SNOOPING” RESOURCE LOCKING CHAPTER 8: SYSTEM CONFIGURATION AND THE PCI BIOS WHO CONFIGURES THE SYSTEM? SYSTEM CONFIGURATION—AN OVERVIEW PCI BIOS BIOS SERVICES CHAPTER 9: COMPACTPCI INTRODUCTION—WHY COMPACTPCI? MECHANICAL ELECTRICAL COMPACTPCI BRIDGING CHAPTER 10: HOT PLUG AND HOT SWAP PCI HOT PLUG COMPACTPCI HOT SWAP CHAPTER 11: INTRODUCTION TO PCI-X WHY PCI-X WHAT’S NEW BACKWARD COMPATIBILITY CHAPTER 12: PCI-X PROTOCOL PCI-X TRANSACTIONS PCI-X COMMANDS SPLIT TRANSACTIONS ERROR CHECKING AND CORRECTING SOURCE SYNCHRONOUS DATA TRANSFERS DEVICE ID MESSAGES 16-BIT BUS CHAPTER 13: PCI-X CONFIGURATION AND INITIALIZATION CONFIGURATION TRANSACTION TIMING CONFIGURATION ADDRESS CONFIGURATION ATTRIBUTES CONFIGURATION HEADER REGISTERS PCI-X CAPABILITIES LIST ITEM MODE 2 CONFIGURATION SPACE INITIALIZATION CHAPTER 14: PCI-X ELECTRICAL AND MECHANICAL FEATURES SIGNAL CATEGORIES TIMING PARAMETERS 1 5 VOLT SIGNALING ENVIRONMENT PCIXCAP AND MODE2