EMBEDDED MICROCONTROLLER SYSTEM DESIGN
1 REVIEW OF ELECTRONICS FUNDAMENTALS OBJECTIVES EMBEDDED MICROCOMPUTER APPLICATIONS MICROCOMPUTER AND MICROCONTROLLER ARCHITECTURES DIGITAL HARDWARE CONCEPTS VOLTAGE, CURRENT, AND RESISTANCE DIODES TRANSISTORS MECHANICAL SWITCHES TRANSISTOR SWITCH ON TRANSISTOR SWITCH OFF THE FET AS A LOGIC SWITCH NMOS LOGIC CMOS LOGIC MIXED MOS REAL TRANSISTORS DONÌT EAT Q! LOGIC SYMBOLS TRI-STATE LOGIC TIMING DIAGRAMS MULTIPLEXED BUS LOADING AND NOISE MARGIN ANALYSIS THE DESIGN AND DEVELOPMENT PROCESS CHAPTER ONE PROBLEMS 2 MICROCONTROLLER CONCEPTS ORGANIZATION: VON NEUMANN VS HARVARD MICROPROCESSOR/MICROCONTROLLER BASICS MICROCONTROLLER CPU, MEMORY, AND I/O DESIGN METHODOLOGY THE 8051 FAMILY MICROCONTROLLER PROCESSOR ARCHITECTURE INTRODUCTION TO THE 8051 ARCHITECTURE MEMORY ORGANIZATION CPU HARDWARE OSCILLATOR AND TIMING CIRCUITRY THE 8051 MICROCONTROLLER INSTRUCTION SET SUMMARY DIRECT AND REGISTER ADDRESSING INDIRECT ADDRESSING IMMEDIATE ADDRESSING GENERIC ADDRESS MODES AND INSTRUCTION FORMATS ADDRESS MODES THE SOFTWARE DEVELOPMENT CYCLE SOFTWARE DEVELOPMENT TOOLS HARDWARE DEVELOPMENT TOOLS CHAPTER TWO PROBLEMS 3 WORST- CASE TIMING, LOADING, ANALYSIS, AND DESIGN TIMING DIAGRAM NOTATION CONVENTIONS RISE AND FALL TIMES PROPAGATION DELAYS SETUP AND HOLD TIME TRI-STATE BUS INTERFACING CONTENTS PULSE WIDTH AND CLOCK FREQUENCY FAN-OUT AND LOADING ANALYSIS„DC AND AC CALCULATING WIRING CAPACITANCE FAN-OUT WHEN CMOS DRIVES LSTTL TRANSMISSION LINE EFFECTS GROUND BOUNCE LOGIC FAMILY IC CHARACTERISTICS AND INTERFACING INTERFACING TTL COMPATIBLE SIGNALS TO 5 VOLT CMOS DESIGN EXAMPLE: NOISE MARGIN ANALYSIS SPREADSHEET WORST-CASE TIMING ANALYSIS EXAMPLE CHAPTER THREE REVIEW PROBLEMS 4 MEMORY TECHNOLOGIES AND INTERFACING MEMORY TAXONOMY SECONDARY MEMORY VOLATILITY RANDOM ACCESS MEMORY SEQUENTIAL ACCESS MEMORY DIRECT ACCESS MEMORY READ/WRITE MEMORIES READ-ONLY MEMORY OTHER MEMORY TYPES JEDEC MEMORY PIN-OUTS DEVICE PROGRAMMERS MEMORY ORGANIZATION CONSIDERATIONS PARAMETRIC CONSIDERATIONS ASYNCHRONOUS VS SYNCHRONOUS MEMORY ERROR DETECTION AND CORRECTION ERROR SOURCES CONFIDENCE CHECKS MEMORY MANAGEMENT CACHE MEMORY VIRTUAL MEMORY CPU CONTROL LINES FOR MEMORY INTERFACING CHAPTER FOUR PROBLEMS READ AND WRITE OPERATIONS 5 CPU BUS INTERFACE AND TIMING ADDRESS, DATA, AND CONTROL BUSES ADDRESS SPACES AND DECODING ADDRESS MAP CHAPTER FIVE PROBLEMS THE CENTRAL PROCESSING UNIT (CPU) 6 A DETAILED DESIGN EXAMPLE EXTERNAL DATA MEMORY CYCLES EXTERNAL MEMORY DATA MEMORY READ EXTERNAL DATA MEMORY WRITE DESIGN PROBLEM 1 DESIGN PROBLEM 2 DESIGN PROBLEM 3 COMPLETING THE ANALYSIS CHAPTER SIX PROBLEMS MEMORY SELECTION AND INTERFACING PRELIMINARY TIMING ANALYSIS 7 PROGRAMMABLE LOGIC DEVICES INTRODUCTION TO PROGRAMMABLE LOGIC TECHNOLOGIES: FUSE-LINK, EPROM, EEPROM, AND RAM STORAGE PROM AS PLD PROGRAMMABLE LOGIC ARRAYS PAL-STYLE PLDS DESIGN EXAMPLES PLD DEVELOPMENT TOOLS SIMPLE I/O DECODING AND INTERFACING USING PLDS IC DESIGN USING PCS CHAPTER SEVEN PROBLEMS DIRECT CPU I/O INTERFACING 8 BASIC I/ O INTERFACES PORT I/O FOR THE 8051 FAMILY OUTPUT CURRENT LIMITATIONS SIMPLE INPUT/OUTPUT DEVICES MATRIX KEYBOARD INPUT MATRIX DISPLAY DEVICES PROGRAM-CONTROLLED I/O BUS INTERFACING REAL-TIME PROCESSING DIRECT MEMORY ACCESS (DMA) BURST VS SINGLE CYCLE DMA CYCLE STEALING ELEMENTARY I/O DEVICES AND APPLICATIONS TIMING AND LEVEL CONVERSION CONSIDERATIONS LEVEL CONVERSION POWER RELAYS CHAPTER EIGHT PROBLEMS 9 OTHER INTERFACES AND BUS CYCLES INTERRUPT CYCLES SOFTWARE INTERRUPTS HARDWARE INTERRUPTS INTERRUPT DRIVEN PROGRAM ELEMENTS CRITICAL CODE SEGMENTS SEMAPHORES INTERRUPT PROCESSING OPTIONS LEVEL AND EDGE TRIGGERED INTERRUPTS VECTORED INTERRUPTS NON-VECTORED INTERRUPTS SERIAL INTERRUPT PRIORITIZATION PARALLEL INTERRUPT PRIORITIZATION CONSTRUCTION METHODS 10 OTHER USEFUL STUFF ELECTROMAGNETIC COMPATIBILITY ELECTROSTATIC DISCHARGE EFFECTS FAULT TOLERANCE INSTRUMENTATION ISSUES OTHER SPECIALIZED DESIGN CONSIDERATIONS THERMAL ANALYSIS AND DESIGN BATTERY POWERED SYSTEM DESIGN CONSIDERATIONS PROCESSOR PERFORMANCE METRICS DEVICE SELECTION PROCESS POWER AND GROUND PLANES GROUND PROBLEMS 11 OTHER INTERFACES ANALOG SIGNAL CONVERSION SPECIAL PROPRIETARY SYNCHRONOUS SERIAL INTERFACES UNCONVENTIONAL USE OF DRAM FOR LOW COST DATA STORAGE DIGITAL SIGNAL PROCESSING / DIGITAL AUDIO RECORDING